General Description

The F81804 is the featured IO chip for Industrial PC system. Equipped with 2 UART ports with Multi drop function (9-bit protocol), SIR, 80 port, master SPI, ACPI management function. Each UART provides 16/32/64/128 bytes FIFO. The UART supports legacy speeds up to 115.2K bps as well as even higher baud rates of 230K, 460K, or 921K bps to support higher speed modems. The F81804 supports keyboard and mouse interface which is 8042-based keyboard controller.

The F81804 integrated with hardware monitor, 6 sets of voltage sensor, 2 sets of creative auto-controlling smart fans and 2 temperature sensor pins for the accurate dual current type temperature measurement for CPU thermal diode or external transistors 2N3906 and one local temperature. The F81804 provides flexible features for multi-directional application. For instance, supports 30 GPIO pins, IRQ sharing function designed in UART feature for particular usage and accurate current mode H/W monitor will be worth in measurement of temperature. Others, the F81804 supports newest Intel PECI 3.0 interfaces for new generational CPU temperature usage, INTEL IBX PEAK, I2C and AMD TSI for temperature reading. In order to save the current consumption when the system is in the soft off state which is so called power saving function. The power saving function supports the system boot-on not only by pressing the power button but also by the wake-up events via GPIO0x, GPIO1x, RI1#. When the system enters the S3/S4/S5 state, F81804 can cut

off the VSB power rail which supplies power source to the devices like the LAN chip, the chipset, the SIO, the audio codec, DRAM, and etc. The PC system can be emulated to G3-like state when the system enters S3/S4/S5 states. At the G3-like state, the F81804 consumes 5VSB power rail only. The integrated two control pins are utilized to turn on or off VSB power rail in the G3-like status. The turned on VSB rail is supplied to a wake up device to fulfill a low power consumption system which supports a wake up function. The F81804 has eSPI and LPC interfaces where the interface would be detected automatically. Those interfaces could be workable with 1.8V or 3.3V. These features as above description will help you more and improve the product value. The F81804 is in the package of 64-TQFP. (7mm*7mm)

I2C Function

Support I2C Function Via Pin 23, 30(SDA) & Pin 22, 26 (SCL); I2C slave 400K bps I2C master 66K bps

eSPI / LPC Interface

Comply with Intel's Slave LPC Interface Specification Revision 1.1
Comply with Intel's Slave eSPI 1.0 Specification.
LRESET#/SIRQ Support Low Voltage Level for 1.8V

Hardware Monitor Management

Monitoring hardware monitor functions under S3 could be disabled.
Support IBX PCH temperature reading via I2C
Support AMD TSI, MXM via I2C pins.
Digital Thermal Interfaces
- Intel® PECI 3.1 for Intel CPU thermal monitoring
  - 4 selectable PECI address 30h~33h
  - CPU address auto detect mode
- Intel Ibex thermal monitoring
- SB-TSI for AMD® CPU and MXM thermal monitoring
- T1 and T2 beta compensation
Analog Thermal I nterface
- 2 x Thermistor or Thermal Diode (BJT) connected to device ADC inputs
- Support Dual Current Type ( ± 3 ˚ C ) thermal inputs
- 1 x Local Temperature source
- Can set Temperature sensor OVT limit and high limit
Fan Control and Monitor
- 2 Auto PWM or DAC fan controls
- 2 Fan speed monitoring inputs
- Fan control support Stage Auto Mode (4-Limit and 5-Stage)/Linear Auto Mode/Manual Mode
- Programmable hysteresis and setting points for all monitored items
- Provide FAN real time status
- Temperature over high limit FAN can force full speed
- Programmable PWM mode up to 300 kinds of frequencies (15Hz~23.5KHz)
6 voltage monitoring and indication (VIN1, VIN2, 3VCC, 5VSB, 3VSB, VBAT)
- Monitoring VBAT voltage could be disabled via the register
- Voltage-Protect Status
  - Over Voltage Protect (OVP) Limit: 3VCC, VIN1, VIN2
  - Under Voltage Protect (UVP) Limit: 3VCC, VIN2
- Shut down when OVP/UVP occurred
- 3VCC, VIN2
Generates OVT#, PME#, BEEP or shutdown via hardware signals output on critical temperature events
- OVT
  - Temperature over limit support max three source
  - Even output support level mode and pulse mode
  - Event output can indicate by 1Hz LED or 400/800Hz BEEP
- ALERT
  - Even output support level mode and pulse mode
  - Event output can indicate by 1Hz LED or 400/800Hz BEEP
- BEEP
  - Event output source support OVT or ALERT
  - Case intrusion detection (COPEN#)
  - Even output via Beep and PME at the same time

Power Management

Provide Power Saving Function (Comply ERP lot 6.0)
Support Intel Deep Sleep Well (DSW) state control
Support ACPI
Support G3 like state control
Built in Two Control Pins with VSB Power Sources Control
System Wake-Up Control
- Optional routing of events to generate PME on detection of:
  - Keyboard keystrokes
  - Mouse movement and/or button left click
  - Ring Indication RI1# and RI2# on the serial ports
Provide ATX Emulates AT Function
Support Auto Re-Generates PWSOUT# Signal Only At Always On Or AT Mode Which Would Be Auto Regenerated After 800ms Until S3# De-Asserted.
AC Loss and Resume Control Method
- Always On
- Always Off
- Bypass Mode
- Keep Last State Old Mode
- Keep Last State New Mode (Do not check ATXPG)

Glue Functions

LED status indication
- Programmable blinking at S0, S3, Deep S3, S5 state
- Use Along with UART1/2
  - TX LED 1/2: Output Via DTR1/2#
  - RX LED 1/2: Output Via DSR1/2#
Watch Dog Timer
- Time resolution minute/second
  - Maximum 256 minutes or 256 seconds
- Time Out Signal Can Output Via WDTRST#, PWROK
- Support WDT Reset Function
- Support WDT wake up while ERP function is enabled

Legacy Modules

UART
- 2 High-Speed 16C550/16C650/16C750/16C850/16C950 Compatible UARTs
- Programmable 16/32/64/128 bytes Send/Receive FIFO Depth
- Support RS232, RS422 and RS485
- RS485 Mode
  - Auto Flow Control
- RS232 Mode
  - Hardware Auto Flow Control With via DTR# or RTS#
- Baud Rate
  - Baud Rate Supports 115.2 Kbps, Up To 1.5 Mbps
  - Programmable
  - Baud Rate
- Support IRQ 3,4,5,6,7,8,9,10,11 Sharing
- Provide Multi Drop (9-Bits) Function for Gaming Machine
- Support Ring-In Wake Up Via In RI1# And RI2#
80-Port Interface
- Monitor 0x80 Port and Output the Value Via Signals Defined For 7-Segment Display.
- High Nibble and Low Nibble Are Outputted Interleaved At 1KHz Frequency.
- 80 Port Is Programmable Via UART2
- Temperature Data Could Be Output Via 80 Port
- Enable Via Power on Strapping Pin or Register.
Master SPI Interface
- Support 8 Clock & 8 Bit Data.
- CS# Could Be Kept Low or Return to High Stage.
- Support Master SPI Function Which Could Be Selected from UART 2 (Programmable Via UART2)
PS/2 Keyboard and Mouse Controller (KBC)
- Provide one KBC
- Support Keyboard/Mouse wakeup and swap function
- Compatibility with the 8042
- Hardware Gate A20 and Hardware Keyboard Reset
General-Purpose Input/ Output
- Provide 4 sets of GPIO (GPIO0x/1x/5x) SMI event via PME# or SIRQ
- 30 GPIO pins for flexible application, all GPIOs individually configured as input or output
- GPIO0x and GPIO1x support interrupt status (wake up)
- GPIO0x, GPIO1x and GPIO5x support different SIRQ channels
- GPIO1x Supports 8 Functions: GPIO (default), PME#, CLKOUT, BEEP, LED_VCC, LED_VSB, WDTRST#, ALERT#
Clocks
- CLKIN supports 24 /48 MHz (default) clock input, others clock could be programmable internally via register.
- CLKOUT = 48MHz / (CLKOUT_PRE_DIV * 2), where CLKOUT would be 48/24/12/8MHz → Index 2Bh (CLK_TUNE_PROG_EN = 0, BANK_PROG_SEL = 1), bit 5-4

Power Supply
- 1.8V VCC For ESPI Bus Operation
- 1.8V/3.3V VCC For LPC Bus Operation
- 5VSB, 3VCC, 3VSB, VBAT
Package
- 64-PIN TQFP (7mm*7mm) Green Package
- Operation Temperatures Range -40°C to 85°C

Patented TW207103 TW207104 TW220442 US6788131 B1 TWI235231 TW237183 TWI263778

64-TQFP (7mm x 7mm)

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