The F85008 has eight bidirectional translation switches which controlled by the I2C/ SMbus. The upstream pair M_SCL/M_SDA fans out 8 downstream channels. Any individual SCLx/SDAx channel or combination of channels can be selected, determined by the contents of the programmable control register. An active LOW reset input allows the F85008 to recover from a situation where one of the downstream I2C -buses is stuck in a LOW state. Pulling the RESET# pin LOW resets the I2C -bus state machine and causes all the channels to be deselected as does the internal Power-on reset function. The pass gates of the switches are constructed such that the VDD pin can be used to limit the maximum high voltage which will be passed by the F85008. This allows the use of different bus voltages on each pair, so that 1.8 V or 2.5 V or 3.3 V parts can communicate with 5 V parts without any additional protection. External pull-up resistors pull the bus up to the desired voltage level for each channel. All I/O pins are 6 V tolerant. |
The F85008 is in the 24 pin QFN package (4mm x 4mm) and 24 pin TSSOP package (173mil).