F81968
General Description

The F81968 is the featured IO chip for Industrial PC system. Equipped with one IEEE 1284 parallel port, 6 UART ports with multi-drop function (9-bit protocol), SIR, 80 port, master SPI, ACPI management function. Each UART provides 16/32/64/128 bytes FIFO. The UART supports legacy speeds up to 115.2K bps as well as even higher baud rates of 230K, 460K, 921K or 1.5M bps to support higher speed modems. The F81968 supports the enhanced parallel port (EPP) and the extended capabilities port (ECP). The F81968 supports keyboard and mouse interface which is 8042-based keyboard controller. The F81968 is integrated with hardware monitor, 8 sets of voltage sensor, 3 sets of creative auto-controlling smart fans and 2 temperature sensor pins for the accurate dual current type temperature measurement for CPU thermal diode or external transistors 2N3906 and one local temperature. The F81968 provides flexible features for multi-directional application. For instance, supports up to 104 GPIO pins, IRQ sharing function designed in UART feature for particular usage and accurate current mode H/W monitor will be worth in measurement of temperature. Others, the F81968 supports newest Intel PECI 3.1 interfaces for new generational CPU temperature usage, INTEL IBX PEAK, I2C and AMD TSI for temperature reading In order to save the current consumption when the system is in the soft off state which is so called power saving function. The power saving function supports the system boot-on not only by pressing the power button but also by the wake-up events via GPIO0x, GPIO1x, RI1#, and RI2#. When the system enters the S3/S4/S5 state, the F81968 can cut off the VSB power rail which supplies power source to the devices like the LAN chip, the chipset, the SIO, the audio codec, DRAM, and etc. The PC system can be emulated to G3-like state when the system enters S3/S4/S5 states. At the G3-like state, the F81968 consumes 5VSB(or I_VS3V) power rail only. The two integrated control pins are utilized to turn on or off VSB power rail in the G3-like status. The turned on VSB rail is supplied to a wake up device to fulfill a low power consumption system which supports a wake up function. The F81968 is also suited for Skylake eSPI interface. It has eSPI and LPC interfaces where the interface would be detected automatically. Those interfaces could be workable with 1.8V or 3.3V. It also supports an eSPI to LPC bridge to provide a LPC master for Fintek LPC SIOs’ usage. LPC master only supports I/O and memory byte R/W function. Another feature in F81968 is the embedded 8032 μC. With this feature, the system designer could fine tune the power sequence, create various specific feature suited for their products. A SPI flash is needed for embedded uC to execute. A JTAG interface for debugging is also provided to easily firmware development. These features described above will help you more and improve the product value. The F81968 has three types package dimension: F81968D-I is in the package of 128 pin-LQFP. (14mm x 14mm).

  • FEATURES
  • PACKAGE
  • ATTACHMENTS

Feature

I2C Function

(1)   4 selectable clock pins and 4 selectable data pins.

(2)   Supports 2 masters/slaves controlled by µC.

(3)   I2C slave 400K bps/ I2C master 66K bps

(4)   I2C pins support low input level for 1.8V application.

 

eSPI / LPC Interface

(1)      Comply with Intel’s Slave LPC Interface Specification Revision 1.1

(2)      Comply with Intel’s Slave eSPI 1.0 Specification

(3)      LRESET#/SIRQ Support low voltage level for 1.8V

(4)      Support Master LPC Interface for Fintek SIOs’ Usage Which Could Be Programmable

(5)      LPC master only supports I/O and memory byte R/W function.

8032 Microcontroller (µC)

(1)   GPIO Control

(2)   Hardware Monitor Control

(3)   ACPI Control

(4)   Keyboard control.

(5)   JTAG debug and ISP

 

Hardware Monitor Management

(1)   H/W monitor functions

(a)   Support OVP & UVP for 3VCC and VIN2&3

(b)   Support smart fan

(c)   Support PECI 3.1

(d)   Support Ibex PCH temperature reading via I2C pins.

(2)   Support AMD TSI, MXM via I2C pins.

(3)   Monitoring hardware monitor functions under S3 could be enabled.

(4)   Digital Thermal Interfaces

(5)   Analog Thermal Interface

(a)     2 x Thermistor or Thermal Diode (BJT) connected to device ADC inputs

(b)     1 x Local Temperature source

(c)     Temperature sensor can setting OVT limit and high limit

(d)     T1 and T2 beta compensation

(6)   Generates OVT#, ALERT#, BEEP or PME# on critical temperature events

(a)    OVT#

Temperature over limit support max three sources

Event output support level mode and pulse mode

Event output can indicate by 1Hz LED or 400/800Hz Beep

(b)   ALERT#

Even output support level mode and pulse mode

Event output can indicate by 1Hz LED or 400/800Hz Beep

(c)   BEEP

Event output source support OVT or Alert

(7)   Fan Control and Monitor

(a)   3 Auto PWM or DAC fan controls

(b)   3 Fan speed monitoring inputs

(c)   Fan control support Stage Auto Mode /Linear Auto Mode/Manual Mode

(d)   PWM mode could be programed up to 300 kinds of frequencies (15Hz~23.5KHz)

(8)   8 Voltage Monitoring And Indication (VIN1, VIN2, VIN3, VIN4, 3VCC, 5VSB, 3VSB, VBAT)

(a)   Monitoring VBAT

(b)   Voltage-Protect Status

(i)         Over Voltage Protect (OVP) Limit

(ii)        Under Voltage Protect (UVP) Limit

(iii)       Shut down when OVP/UVP occurred

(c)   Over Voltage Interrupt

(9)   Case intrusion detection (COPEN#)

 

Power Management

(1)      Provide Power Saving Function (Comply ERP lot 6.0)

(2)      Support ACPI

(3)      Support Intel Deep Sleep Well (DSW) state control

(4)      Support G3 like state control

(5)      Built in Two Control Pins with VSB Power Sources Control

(6)      System Wake-Up Control

(7)      Provide ATX Emulates AT Function

(8)      Support AC Resume Fail Check

(9)      Support Auto Re-Generates PWSOUT# Signal Only At Always On Or AT Mode

(10)   AC Loss and Resume Control Method

 

Glue Functions

(1)   LED status indication

(a)   Programmable blinking at S0, S3, Deep S3, S5 state

(b)   Use Along With UART1~6

(c)   TX LED Output Via DTR

(d)   RX LED Output Via DSR

(2)   Watch Dog Timer

(a)   Support WDT Reset Function

(b)   Support WDT wake up while ERP function is enabled 

(c)   Time resolution minute/second

(d)   Maximum 256 minutes or 256 seconds

Legacy Modules

(1)   UART

(a)   Provide 6 fully functional UART and 1 SIR

(b)   6 High-Speed 16C550/16C650/16C750/16C850/16C950 Compatible UARTs

(c)   Programmable 16/32/64/128 bytes Send/Receive FIFO Depth

(d)   Support Multi-Drop (9-bit) Function

(e)   Support IRQ Sharing

(f)    Support Ring-In Wake up

(g)   RS232, RS422 and RS485 provide auto flow control

(h)   Baud Rate could be programed

(2)   Parallel Port (LPT)

(a)     Provide Parallel Port (LPT) Which Could Be Divided Into Data And Signal Port Via Registers

(b)     One PS/2 compatible bi-directional parallel port

(c)     Support Enhanced Parallel Port (EPP) Compatible with IEEE 1284

(d)     Support Extended Capabilities Port (ECP) Compatible with IEEE 1284 

(e)     Enhanced printer port back-drive current protection

(3)   80-Port Interface

(a)  Monitor 0x80 Port

(b)  Output value via 7-Segment Display

(c)  Could be selected from UART6 Or LPT where default is output from printer’s data bus.

(d)  High Nibble And Low Nibble Are Outputted Interleaved At 1KHz Frequency.

(e)  Temperature Data Could Be Output Via 80 Port

(4)   Master SPI Interface

(a)  Support Master LPC Interface for Fintek SIOs’ Usage Which Could Be Programmable

(b)  Support Master SPI Function Which Could Be Selected from UART 6 or LPT

(c)  Support 8 Clock & 8 Bit Data.

(5)   PS/2 Keyboard and Mouse Controller (KBC)

(a)   Provide one KBC

(b)   Support Keyboard/Mouse wakeup and swap function

(c)   Compatibility with the 8042

(d)   Hardware Gate A20 and Hardware Keyboard Reset

(6)   General-Purpose Input/ Output

(a)  94 pins GPIO, all GPIOs individually configured as input or output

(b)  Provide 4 sets of GPIO SMI event via PME# or SIRQ

(c)  GPIO0x and GPIO1x support interrupt status (wake up)

Clock, Supply and Package Information

(1)   Clocks

(a)   CLKIN supports 24 /48 MHz (default) clock input, others clock could be programmable

(b)   CLKOUT = 48MHz / (CLKOUT_PRE_DIV * 2), where CLKOUT would be 48/24/12/8MHz

(2)   Power Supply

(a) 1.8V VSB For eSPI Bus Operation

(b) 1.8V/3.3V VCC For LPC Bus Operation

(c) 5VSB, 3VCC, 3VSB, VBAT


(3)   Package and Operating Temperature

(a)   F81968D-I is in 128- LQFP (14mm x 14mm)

(b)   Operation Temperatures Range: -40°C ~ 85°C

Patented TW207103 TW207104 TW220442 US6788131 B1 TWI235231 TW237183 TWI263778

128- LQFP (14mm x 14mm)
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