The F75910 is an I2C-bus/SMBus voltage level shifter with enable (EN) input. Suitable for the application of I2C embedded in DVI / VGA interface, which is attached with long cable. The open-drain design of F75910 can help the environment with huge inductance like DVI / VGA interface to avoid I2C signal reflecting phenomenon.
The F75910 is operational from 1.1 V to [VCC(H)-1.0 V] on L-Port and 2.5 V to 5.5 V on H-port. The Enable (EN) input is referenced to VCC(L) with 5V tolerant. When F75910 is disabled, both port L and port H I/O pins became high-impedance.
The bus port H are compliant with any digital signals, the standard I2C-bus or SMBus I/O levels, while port L uses a current sensing mechanism to detect the input or output LOW signal which prevents bus lock-up. This results in a LOW on the port L accommodating smaller voltage swings. The output pull-down on the port L internal buffer LOW is set for approximately 0.2 V, while the input threshold of the internal buffer is set about 50 mV lower than that of the output voltage LOW. When the port L I/O is driven LOW internally, the LOW is not recognized as a LOW by the input. This prevents a lock-up condition from occurring. The output pull-down on the port H drives a hard LOW and the input level is set at 0.3 of SMBus or I2C-bus voltage level which enables port H to connect to any other I2C-bus devices or buffer.
The F75910 is not enabled unless VCC(L)is above 0.8 V and VCC(H)is above 2.5 V. The enable (EN) pin can also be used to turn the drivers on and off under system control. Caution should be observed to only change the state of the EN pin when the bus is idle.
Voltage level shifting from L-Port: 1.1V to (VCC(H) -1.0V)
Voltage level shifting from H-Port: 2.5V to 5.5V
High impedance bus pin when Power-off
Open-drain I/O on high-side
EN input circuit referenced to VCC(L)
8-pin MSOP Green Package